What's Happening?
Nagare Labs, a Georgia Tech spinout backed by Pat Gelsinger, is developing a new memory technology called Z2RAM. This technology aims to combine the speed of SRAM with the density of DRAM, integrating it directly onto AI chips. The company's founders
have published papers detailing a rapidly improving cell that can retain data for over 300 seconds at 85 degrees Celsius. The first generation of Z2RAM is projected to offer five times the density of SRAM, achieve 14 times the speed of DRAM, and consume three times less read energy than SRAM. Z2RAM utilizes a capacitorless design, employing two transistors and a shield to store charge, which allows for non-destructive reads and eliminates the need for DRAM's write-back process. The memory layers are deposited directly on top of the accelerator and patterned together on one die, similar to 3D NAND flash, without the need for interposers or bonds between layers. This process uses standard 300mm tools with DUV lithography, avoiding the need for EUV. The current roadmap targets over 100 layers with hundreds of thousands of vertical connections.
Why It's Important?
The development of Z2RAM is significant for the AI industry, which faces increasing demands for memory bandwidth that current High-Bandwidth Memory (HBM) solutions struggle to meet due to yield issues and thermal limitations. Existing stacked memory solutions like HBM and Samsung's zHBM are constrained by the heat generated by the underlying logic, limiting the number of layers and overall performance. Z2RAM's ability to integrate high-speed, high-density memory directly onto AI chips could alleviate this 'memory wall' bottleneck, enabling more powerful and efficient AI accelerators. By offering SRAM-like speed with DRAM-like capacity, Z2RAM could significantly improve the performance of AI workloads, which are often memory-bound rather than compute-bound. The technology's projected lower energy consumption for reads also contributes to overall system efficiency, a critical factor in large-scale AI deployments. If successful, Z2RAM could reshape how memory is integrated into AI processors, offering a competitive advantage in the rapidly evolving AI hardware landscape.
What's Next?
Nagare Labs is currently in the lab prototype phase, with sampling of Z2RAM tiles targeted within four years and potential production shipments within the next decade. A significant next step for the company is to secure an R&D fab partner to scale beyond university clean rooms, as it currently lacks its own fabrication facilities. Additionally, Nagare Labs will need to develop a standard interface for integrating this new type of memory with accelerators, as no such standard currently exists. The company also faces challenges in proving the reliability of its design, particularly concerning single-electron effects that could affect data integrity. Further testing is required to demonstrate data retention above 95 degrees Celsius, which is the typical operating temperature limit for DRAM. The success of Z2RAM will depend on overcoming these technical and manufacturing hurdles, as well as establishing partnerships for fabrication and packaging to bring the technology to market.
Beyond the Headlines
The pursuit of Z2RAM by Nagare Labs highlights a broader industry trend towards novel memory architectures to address the escalating demands of AI and high-performance computing. The challenges of integrating memory directly onto compute dies, particularly thermal management and manufacturing complexity, are pushing the boundaries of semiconductor engineering. Z2RAM's capacitorless design represents a fundamental shift from traditional DRAM, potentially simplifying manufacturing processes and reducing power consumption. The involvement of industry figures like Pat Gelsinger underscores the strategic importance of solving the memory bottleneck for the future of computing. If successful, this technology could not only enhance AI capabilities but also influence the design of general-purpose processors, leading to more integrated and efficient computing systems. The development also reflects the ongoing innovation in materials science and device physics, as researchers explore new ways to store and access data at the atomic level, pushing beyond the limitations of conventional silicon-based memory.
