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What is the story about?
India has formally notified Semicon 2.0, opening the next phase of its semiconductor push to a much wider set of companies and institutions — from chip-design startups and MSMEs to semiconductor fabs, packaging companies, materials manufacturers, research organisations and training institutions.
The notification by the Ministry of Electronics and Information Technology (MeitY) divides eligible applicants into six pillars and 10 categories.
The notification comes after the Union Cabinet approved the ₹1.27 lakh crore outlay for India Semiconductor Mission 2.0, as reported earlier by CNBC-TV18.
The key takeaway for businesses is that there is no single eligibility rule for the entire scheme. The thresholds vary depending on what a company wants to build.
Who can apply under Semicon 2.0?
Startups and MSMEs get a specific route
Under the commercial chip-design category, eligible startups and MSMEs can access the Design Infrastructure Support framework, including centralised access to the national EDA tools grid and multi-project wafer fabrication services.
They can also seek seed funding of up to ₹15 crore under the Product Design Linked Incentive (P-DLI). The advance seed support will be milestone-linked and capped at 50% of project cost or ₹15 crore, whichever is lower. Companies that have already secured VC or PE funding can also receive equity co-investment under the scheme.
For larger eligible companies, the scheme provides royalty financing or equity co-investment. Under royalty financing, the beneficiary pays 5% of the product/technology's net revenue until an amount equivalent to 1.5 times the government support has been recovered.
What does it take to build a semiconductor fab?
For a silicon semiconductor wafer fab, an applicant must propose a 300-mm wafer facility with installed capacity of at least 40,000 wafer starts per month. It must own or possess production-grade licensed technology for the proposed process, invest at least ₹20,000 crore, and have minimum revenue of ₹7,500 crore in at least one of the three financial years preceding the application.
The government will fund 40% of eligible capital expenditure, on a pari passu basis, meaning equal footing with other investors' contributions.
This is considerably lower than 50% in phase 1.
For compound semiconductor, photonics, sensor/MEMS and discrete semiconductor fabs, the thresholds are considerably lower: minimum investment of ₹500 crore, minimum revenue of ₹200 crore, and capacity of at least 500 wafer starts per month, with technology-specific wafer-size requirements. Government support is 35% of eligible capex.
What about semiconductor materials and equipment?
Companies can apply for projects involving semiconductor equipment R&D, semiconductor-grade raw materials, testing and characterisation facilities, and manufacturing or assembly of equipment, sub-assemblies and components used in fabs and packaging facilities.
Except for testing and characterisation facilities, applicants are expected to own or possess licensed technology for the proposed unit.
The thresholds include:
For equipment manufacturing, the government will additionally provide a PLI of 10%, 8%, 6%, 4%, or 2% of the value of the bill of materials sourced from domestic manufacturers, for five years beginning FY29, subject to an overall ceiling of 50% of eligible capex.
Packaging companies can also apply
Semicon 2.0 covers both advanced and legacy packaging.
For advanced packaging — including 2.5D/3D packaging, wafer-level chip-scale packaging, heterogeneous integration and advanced substrates — applicants need a minimum capex of ₹1,000 crore, revenue of ₹200 crore in at least one of the preceding three financial years and production-grade licensed technology. Government support is 35% of eligible capex.
The same ₹1,000 crore capex and ₹200 crore revenue thresholds apply to legacy packaging, but government support is lower at 25% of eligible capex.
This incentive is also considerably lower than 50% in phase 1.
Research institutions and training bodies are also covered
Semiconductor companies can undertake advanced R&D either independently or with academic and R&D organisations. The government can provide up to 75% of project cost, including capex and opex, with separate detailed guidelines to be issued.
For talent development, eligible applicants include Indian academic institutions, R&D organisations and laboratories, scientific societies and domestic training institutions/organisations. They can also receive up to 75% of project cost, including capex and opex.
How can companies apply?
The scheme will initially remain open for applications for three years, with applications submitted through the portal of the nodal agency during the application window, according to the details provided by MeitY.
The India Semiconductor Mission (ISM) is the nodal agency and will invite applications, conduct technical and financial appraisals and recommend applicants. For the chip-design categories, it can work with C-DAC.
The government will evaluate applicants on parameters including process technology, project implementation capability, operational capability and offtake, rather than merely looking at the proposed investment.
Also read: India targets 3-7 nm chip technology in eight years under Semicon 2.0: Vaishnaw
The notification by the Ministry of Electronics and Information Technology (MeitY) divides eligible applicants into six pillars and 10 categories.
The notification comes after the Union Cabinet approved the ₹1.27 lakh crore outlay for India Semiconductor Mission 2.0, as reported earlier by CNBC-TV18.
The key takeaway for businesses is that there is no single eligibility rule for the entire scheme. The thresholds vary depending on what a company wants to build.
Who can apply under Semicon 2.0?
| Category | Who can apply | Key threshold | Government support |
| Chip design — strategic | Indian companies owned and controlled by Indian citizens | Significant Indian operations and manpower | As per competitive RfP |
| Chip design — commercial | Indian companies owned/controlled by Indian citizens or OCIs; startups/MSMEs included | Significant Indian operations and manpower | Seed funding, equity co-investment or royalty financing |
| Deployment of chips | Applicants eligible under Categories 1 & 2 | New chips/IPs/SoCs launched after scheme announcement with no prior sales | 9% of net sales for 5 years |
| Machines & materials | Equipment, raw-material, testing and component companies | Capital/revenue thresholds vary by sub-category | Up to 30% capex for specified segments + PLI in equipment |
| Silicon wafer fabs | Companies setting up silicon fabs | ₹20,000 crore capex; ₹7,500 crore revenue; 300-mm wafers and 40,000 wafer starts/month or more | 40% of eligible capex |
| Compound/photonics/sensor fabs | Companies setting up these fabs | ₹500 crore capex; ₹200 crore revenue | 35% of eligible capex |
| Display fabs | OLED, Micro LED and LCD projects | Thresholds vary by technology | 35% of eligible capex |
| ATMP/OSAT | Advanced and legacy packaging companies | ₹1,000 crore capex; ₹200 crore revenue | 35% for advanced / 25% legacy packaging |
| Advanced semiconductor R&D | Semiconductor companies, alone or with academic/R&D partners | Project-specific | Up to 75% of project cost |
| Talent development | Academic institutions, R&D bodies, labs, scientific societies, domestic training organisations | Project-specific | Up to 75% of project cost |
Startups and MSMEs get a specific route
Under the commercial chip-design category, eligible startups and MSMEs can access the Design Infrastructure Support framework, including centralised access to the national EDA tools grid and multi-project wafer fabrication services.
They can also seek seed funding of up to ₹15 crore under the Product Design Linked Incentive (P-DLI). The advance seed support will be milestone-linked and capped at 50% of project cost or ₹15 crore, whichever is lower. Companies that have already secured VC or PE funding can also receive equity co-investment under the scheme.
For larger eligible companies, the scheme provides royalty financing or equity co-investment. Under royalty financing, the beneficiary pays 5% of the product/technology's net revenue until an amount equivalent to 1.5 times the government support has been recovered.
What does it take to build a semiconductor fab?
For a silicon semiconductor wafer fab, an applicant must propose a 300-mm wafer facility with installed capacity of at least 40,000 wafer starts per month. It must own or possess production-grade licensed technology for the proposed process, invest at least ₹20,000 crore, and have minimum revenue of ₹7,500 crore in at least one of the three financial years preceding the application.
The government will fund 40% of eligible capital expenditure, on a pari passu basis, meaning equal footing with other investors' contributions.
This is considerably lower than 50% in phase 1.
For compound semiconductor, photonics, sensor/MEMS and discrete semiconductor fabs, the thresholds are considerably lower: minimum investment of ₹500 crore, minimum revenue of ₹200 crore, and capacity of at least 500 wafer starts per month, with technology-specific wafer-size requirements. Government support is 35% of eligible capex.
What about semiconductor materials and equipment?
Companies can apply for projects involving semiconductor equipment R&D, semiconductor-grade raw materials, testing and characterisation facilities, and manufacturing or assembly of equipment, sub-assemblies and components used in fabs and packaging facilities.
Except for testing and characterisation facilities, applicants are expected to own or possess licensed technology for the proposed unit.
The thresholds include:
- Semiconductor equipment R&D: ₹300 crore minimum capex and ₹120 crore minimum revenue.
- Semiconductor-grade raw materials: ₹50 crore minimum capex and ₹20 crore minimum revenue.
- Test and characterisation facilities: ₹100 crore minimum capex and ₹40 crore minimum revenue.
- Equipment/sub-assembly/component manufacturing: ₹300 crore minimum capex and ₹120 crore minimum revenue.
For equipment manufacturing, the government will additionally provide a PLI of 10%, 8%, 6%, 4%, or 2% of the value of the bill of materials sourced from domestic manufacturers, for five years beginning FY29, subject to an overall ceiling of 50% of eligible capex.
Packaging companies can also apply
Semicon 2.0 covers both advanced and legacy packaging.
For advanced packaging — including 2.5D/3D packaging, wafer-level chip-scale packaging, heterogeneous integration and advanced substrates — applicants need a minimum capex of ₹1,000 crore, revenue of ₹200 crore in at least one of the preceding three financial years and production-grade licensed technology. Government support is 35% of eligible capex.
The same ₹1,000 crore capex and ₹200 crore revenue thresholds apply to legacy packaging, but government support is lower at 25% of eligible capex.
This incentive is also considerably lower than 50% in phase 1.
Research institutions and training bodies are also covered
Semiconductor companies can undertake advanced R&D either independently or with academic and R&D organisations. The government can provide up to 75% of project cost, including capex and opex, with separate detailed guidelines to be issued.
For talent development, eligible applicants include Indian academic institutions, R&D organisations and laboratories, scientific societies and domestic training institutions/organisations. They can also receive up to 75% of project cost, including capex and opex.
How can companies apply?
The scheme will initially remain open for applications for three years, with applications submitted through the portal of the nodal agency during the application window, according to the details provided by MeitY.
The India Semiconductor Mission (ISM) is the nodal agency and will invite applications, conduct technical and financial appraisals and recommend applicants. For the chip-design categories, it can work with C-DAC.
The government will evaluate applicants on parameters including process technology, project implementation capability, operational capability and offtake, rather than merely looking at the proposed investment.
Also read: India targets 3-7 nm chip technology in eight years under Semicon 2.0: Vaishnaw
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